Embedded Coder module

This blog is about Equalis Embedded Coder module. This module generates targeted C code for wide range of Microchip PIC microcontrollers and dsPIC Digital Signal Controllers from a diagram in Xcos. The approach involves very simple steps, and it is more reliable and time-saving than the traditional approach. I will show you how to implement an open-loop sensored brushless DC electric motor control algorithm in Xcos and how to generates working program for Micrchip dsPICDEM MCLV Development Board for this algorithm.

I will use the Microchip dsPIC Digital Signal Controller (DSC) for this example since it has a sufficiently high performance and incorporates the necessary peripherals such as pulse-width modulation (PWM) modules and fast and flexible analog-to digital converters (ADCs). Figure 1 shows the basic structure of the targeted hardware system.

The block diagram of the targeted hardware system

Figure 1: The block diagram of the targeted hardware system

The dsPIC DSC runs a control algorithm. This algorithm receives a speed demand from the potentiometer via an analog-to-digital (A/D) converter and the Hall effect sensor feedback, and produces a pulse-width modulation (PWM) signal for the drive circuit to control the motor speed. Let's look at more details of the algorithm.

There are two phases to the motor control program. First, the initialization is performed and we wait for 500 ms in order for the bootstrap capacitors to charge. Then the open-loop BLDC control algorithm is executed. The A/D interrupt handler reads the speed demand from the potentiometer regularly and loads its value into the PWM duty cycle registers, which is how the speed of the motor is controlled. The Hall effect sensors are connected to the Change Notification (CN) Pin of the DSC. As the rotor spins, the position of the rotor magnet changes and the rotor enters a different sector. At this moment, a CN interrupt handler reads the Hall effect sensors and using the obtained values from the look-up table updates the Override Control register (OVDCON). This action ensures that the right windings are excited and the motor continues to spin. If a PWM fault interrupt (FLTA) happens during the algorithm operation, the interrupt handler stops the motor and disables other interrupts. Figure 2 illustrates the algorithm, and Figures 3-5 shows the diagrams for the algorithm.

The open-loop BLDC control algorithm

Figure 2: The open-loop BLDC control algorithm

Figure 3: The Xcos diagram for A/D interrupt handler

Figure 4: The Xcos diagram for Change Notification interrupt handler

Figure 5: The Xcos diagram for PWM fault handler

Figure 6 is the diagram for the first phase of the program operation to charge the bootstrap capacitors and the transition to the next phase, and Figure 7 is the diagram to write the initial values to the A/D module configuration registers.

Figure 6: The Xcos diagram for the first phase and the transition to the second phase of the program operation